| 000 | nam a22 a 4500 | ||
|---|---|---|---|
| 999 |
_c16962 _d16962 |
||
| 001 | BD-DhNSU-16962 | ||
| 003 | BD-DhNSU | ||
| 005 | 20190403061617.0 | ||
| 008 | 190403s2006 ukna|||g |||| 001 0|eng d | ||
| 010 | _a | ||
| 020 | _a0123705976 | ||
| 040 |
_aDLC _cDLC _dBD-DhNSU |
||
| 041 | _aeng | ||
| 050 | 0 | 0 |
_aTK7874.75 _b.V587 2006 |
| 082 | 0 | 0 |
_a621.395 _bV627 |
| 245 | 0 | 0 |
_aVLSI test principles and architectures / _cedited by Laung-Terng Wang, Cheng-Wen Wu and Xiaoging Wen |
| 260 |
_aAmsterdam : _bMorgan Kaufmann, _cc2006. |
||
| 300 |
_axx, 495 p. : _bill. ; _c24 cm. |
||
| 650 | 0 | _aIntegrated circuits | |
| 650 | 0 | _aVery large scale Metal oxide semiconductors | |
| 650 | 4 | _aDesign Computer engineering | |
| 700 | 1 | _aWang, Laung-Terng | |
| 700 | 1 | _aWu, Cheng-Wen | |
| 700 | 1 | _aWen, Xiaoging | |
| 942 |
_2lcc _cBK |
||